VENTURE
Revolutionize hardware system design by providing cloud-based development platforms (VPS) for emerging RISC-V 64 microprocessor and FPGA architectures.
APPROACH
Through modular, standardized design principles, the company creates proprietary hardware boards that streamline development of scalable, platform-based solutions. Startup will pursue recognition as a Design Centre of Excellence under Article 17 of Regulation (EU) 2023/1781 (European Chips Act).
CUSTOMIZING DESIGNS
Furthermore, the startup will support customers in designing customized hardware solutions, addressing specific requirements through flexible and innovative approaches.
ROADMAP
Refine the design platforms (VPS) equipped the development boards:
- ZERO for professional and enthusiast users
- UNO for industrial sectors
- APTUM for those who need to base their project on a PC stick
Develop a USB-stick sized cryptographic device (TUTISSIMUS)
CONTACT US NOW
Investors and prospective clients are invited to schedule a meeting to discuss partnership opportunities and get a comprehensive project overview at:
VPS EQUIPPED WITH BOARD “ZERO”
The prototype is at TRL 7 so free trials are available for interested parties.
Adriachips’ entry-level system supports both dedicated RISC-V soft-CPU development and general-purpose FPGA-based DUT design. This solution combines a proprietary FPGA board with a cloud-based development server (VPS) that comes pre-configured with RISC-V-specific development tools. Key features include a pre-installed QEMU emulator for RISC-V running Debian 13 Trixie, enabling seamless customization and deployment directly to the FPGA hardware.
The VPS integrates a GUI-based FPGA board manager that streamlines routine tasks, allowing users to work primarily through an intuitive graphical interface rather than command-line tools.
This allows the development system to boot Debian 13 from the FPGA board with a single click!
The board comes fully equipped with UART, SD card reader, and Ethernet PHY, allowing seamless transition from development to production without emulation hassles. An integrated SD multiplexer enables rapid software deployment by switching storage between the board and VPS. Plus, onboard flash memory (SPI) automatically reloads your bitstream after reset or power cycle so no manual initialization/upload needed.
A comprehensive manual describing the development environment is available to all registered users. Public sections can be downloaded by clicking the last image below:
REGISTER ON THE SITE AND BOOK A FREE VPS TRIAL
FPGA engineers, electronics engineers, RISC-V microprocessor designers, investors interested in the business venture, and all tech enthusiasts can book a free VPS trial by clicking the button below.
All registered users can download the complete Adriachips Zero system manual, even without booking a trial.
VPS EQUIPPED WITH BOARD “UNO”
Building on Prototype Zero’s foundation, prototype Uno establishes our internal reference standard.
Key features:
- PCIe-based architecture featuring up to 4 FPGA chips
- 2 to 16 GB dual-channel DDR4 RAM per FPGA
- Enterprise and AI FPGA solutions
Customization Options: Dedicated server subscribers can fully customize their PCB configuration, including SERDES channel routing between FPGAs and complete PCIe bus control.
Advanced Integration: The platform explores heterogeneous FPGA MPSoC integration with independent CPU and FPGA memory architectures to maximize computational throughput.
APTUM VPS
Following the consolidation of Adriachips UNO, our R&D pipeline will target a new frontier: USB stick-sized computing platforms.
The Vision: Customers gain access to a cloud-based design environment (VPS) leveraging open-source toolchains to create ultra-compact PCBA solutions featuring:
- CPU or FPGA MPSoC architectures
- SPI Flash for bootstram ROM/bitstream storage
- Single-channel DDR4 memory
- eMMC storage subsystem
Target Applications: Industrial automation and strategic corporate deployments requiring data concealment.
TUTISSIMUS SYSTEM
Adriachips’ flagship commercial product, built on the Aptum platform. Tutissimus will be an USB pen which combines a TPM chip with a multi-core RISC-V CPU featuring hardware-accelerated Post-Quantum Cryptography (PQC).
Core Capabilities:
- Hardware Security Module (HSM) – Generate and securely store cryptographic keys
- Independent 2FA Authentication – No third-party services required
- Asymmetric Encryption Engine – Real-time data stream encoding/decoding
- Encrypted Distributed File System (EDFS) – Secure distributed storage management
- Steganography – Covert data concealment capabilities
Management Team
Cristian Stacchini
CEO
Founder of Data Project. Since 2008, has led numerous IT projects for Republic of San Marino’s Public Administration, his expertise spans document classification and management systems, as well as server infrastructure administration.
Denis Delbianco
COO
Co-founder of Made Network in 2000, serving as CEO since 2007. Extensive experience in virtualization environment design and deployment, data center network infrastructure management and server administration for Internet services including web servers, MTAs and document management platforms.
Daniele Giovanardi
CTO
Co-founder of Made Network in 2000, specializing in ERP and scalable e-commerce platforms. Since 2017, his focus has expanded to PKI infrastructure, SSO authentication systems, and automated VPS provisioning. Since 2024, he has been driving migration initiatives to RISC-V architecture.
Project sponsors
CLOUD SERVICE PROVIDER
ASN 13182
SYSTEM INTEGRATOR
Made Network S.r.l.
Cloud Service Provider
ASN 13182
info@madenetwork.it
Via Macanno, 38/N
47923 Rimini (RN)
ITALY
Share Capital € 20,000 f.p.
REA: RN-315382
VAT no.: IT03893580401
The Data Protection Officer (DPO) is Mr. Massimo Bruno who can be contacted at privacy@madenetwork.it